Biphase Mark Protocol

F.W. Vaandrager and A.L. de Groot. Analysis of a Biphase Mark Protocol with Uppaal and PVS. In Formal Aspects of Computing Journal 18(4):433-458, December 2006. Earlier version available as Technical Report NIII-R0445, NIII, Radboud University Nijmegen, 2004.


The biphase mark protocol is a convention for representing both a string of bits and clock edges in a square wave. The protocol is frequently used for communication at the physical level of the ISO/OSI hierarchy, and is implemented on microcontrollers such as the Intel 82530 Serial Communications Controller. An important property of the protocol is that bit strings of arbitrary length can be transmitted reliably, despite differences in the clock rates of sender and receiver, and variations of the clock rates (jitter), and distortion of the signal after generation of an edge. In this article, we show how the protocol can be modelled naturally in terms of timed automata. We use the model checker Uppaal to derive the maximal tolerances on the clock rates, for different instances of the protocol, and to support the general parametric verification that we formalized using the proof assistant PVS. Based on the derived parameter constraints we propose instances of BMP that are correct (at least in our model) but have a faster bit rate than the instances that are commonly implemented in hardware.

DOI 10.1007/s00165-006-0008-1
Technical Report
Uppaal sources: bmp.xml , bmp.q
PVS dump file