Publications of Frits Vaandrager

2012

• [AHV12]
  F. Aarts, F. Heidarian, and F.W. Vaandrager. A Theory of History Dependent Abstractions for Learning Interface Automata. January 2012.
• [HIV12]
  F. Houben, G. Igna and F.W. Vaandrager. Modeling Task Systems Using Parameterized Partial Orders. In Proceedings 18th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2012), Beijing China, April 16-19, 2012. IEEE Computer Society, 2012. To appear.
• [HSV12]
  F. Heidarian, J. Schmaltz and F.W. Vaandrager. Analysis of a Clock Synchronization Protocol for Wireless Sensor Networks. In QAPL'10 special issue. Theoretical Computer Science 413: 87-105, 2012.

2011

• [CEGAR11]
  F. Aarts, F. Heidarian, P. Olsen, and F.W. Vaandrager. Automata Learning Through Counterexample-Guided Abstraction Refinement. October 2011.
• [Va11]
  F.W. Vaandrager A First Introduction to Uppaal. In J. Tretmans, editor. Quasimodo Handbook. To appear.
• [BGVZ11]
  J. Berendsen, B. Gebremichael, F.W. Vaandrager, and Miaomiao Zhang. Formal Specification and Analysis of Zeroconf using Uppaal. In ACM TECS 10(3), Article No 34, April 2011. DOI: 10.1145/1952522.1952527.

2010

• [BJV10]
  J. Berendsen, D.N. Jansen and F.W. Vaandrager. Fortuna: Model Checking Priced Probabilistic Timed Automata. In Proceedings Seventh International Conference on the Quantitative Evaluation of Systems (QEST'2010), Williamsburg, Virginia, USA, September 15 - 18, 2010. pp. 273-281, IEEE Computer Society 2010.
• [AV10]
  F. Aarts and F.W. Vaandrager. Learning I/O Automata. In P. Gastin and F. Laroussinie, editors. Proceedings CONCUR'10, Paris, France, August 31st - September 3rd, 2010. LNCS 6269, pp. 71-85, Springer-Verlag, 2010.
• [ASV10]
  F. Aarts, J. Schmaltz, and F.W. Vaandrager. Inference and Abstraction of the Biometric Passport. In T. Margaria and B. Steffen, editors. Proceedings 4th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA 2010), 18-20 October 2010 - Amirandes, Heraclion, Crete. LNCS 6415, pp. 673-686, Springer-Verlag, 2010.
• [Octopus]
  T. Basten, E. van Benthum, M. Geilen, M. Hendriks, F. Houben, G. Igna, F. Reckers, S. de Smet, L. Somers, E. Teeselink, N. Trcka, F. Vaandrager, J. Verriet, M. Voorhoeve, and Y. Yang. Model-Driven Design-Space Exploration for Embedded Systems: The Octopus Toolset. In T. Margaria and B. Steffen, editors. Proceedings 4th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA 2010), 18-20 October 2010 - Amirandes, Heraclion, Crete. LNCS 6415, pp. 90-105, Springer-Verlag, 2010.
• [IV10]
  G. Igna and F.W. Vaandrager. Verification of Printer Datapaths using Timed Automata. In T. Margaria and B. Steffen, editors. Proceedings 4th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA 2010), 18-20 October 2010 - Amirandes, Heraclion, Crete. LNCS 6416, pp. 412-423, Springer-Verlag, 2010.
• [KLSV10]
  D.K. Kaynar, N.A. Lynch, R. Segala and F.W. Vaandrager. The Theory of Timed I/O Automata. Synthesis Lecture on Distributed Computing Theory, Morgan & Claypool Publishers, Second Edition, 2010.
• F.W. Vaandrager. Uppaal voor Beginners. Course notes (in Dutch), November 2010.
• [BJSV10]
  J. Berendsen, D.N. Jansen J. Schmaltz and F.W. Vaandrager. The Axiomatization of Override and Update. Journal of Applied Logic 8:141-150, 2010. ISSN 1570-8683, DOI: 10.1016/j.jal.2009.11.001.

2009

• [FORMATS09]
  J. Ouaknine and F.W. Vaandrager (editors). Formal Modeling and Analysis of Timed Systems, 7th International Conference, FORMATS 2009, Budapest, Hungary, September 2009, Proceedings. Lecture Notes in Computer Science 5813, Springer-Verlag, 2009.
• [Chess09]
  M. Schuts, F. Zhu, F. Heidarian and F.W. Vaandrager. Modelling Clock Synchronization in the Chess gMAC WSN Protocol. In S. Andova et.al., editors. Proceedings First Workshop on Quantitative Formal Methods: Theory and Applications (QFM'09), Eindhoven, the Netherlands, 3rd November 2009. Electronic Proceedings in Theoretical Computer Science 13, pp.41-54, 2009.
• [TigaOce09]
  I. AlAttili, F. Houben, G. Igna, S. Michels, F. Zhu and F.W. Vaandrager. Adaptive Scheduling of Data Paths using Uppaal Tiga. In S. Andova et.al., editors. Proceedings First Workshop on Quantitative Formal Methods: Theory and Applications (QFM'09), Eindhoven, the Netherlands, 3rd November 2009. Electronic Proceedings in Theoretical Computer Science 13, pp. 1-12, 2009.
• [HSV09]
  F. Heidarian, J. Schmaltz and F.W. Vaandrager. Analysis of a Clock Synchronization Protocol for Wireless Sensor Networks. In A. Cavalcanti and D. Dams, editors. Proceedings FM 2009: Formal Methods, Eindhoven, The Netherlands, November 2009. LNCS 5850, pp. 516-531, Springer-Verlag, 2009.
• [VJK09]
  Frits Vaandrager, David N. Jansen en Els Koopmans Een Module over Model Checking voor het VWO. In F. Vodegel en M. Loots, editors. Proceedings NIOC 2009, Utrecht, 7-8 April 2009, pp. 135-137. Hogeschool Utrecht, 2009.

2008

• [HV08]
  R. Hamberg and F.W. Vaandrager. Using Model Checkers in an Introductory Course on Operating Systems. In Operating Systems Review 42(6):101-111, October 2008. Also available as Technical Report ICIS-R07031, ICIS, Radboud University Nijmegen, December 2007.
• [BV08]
  J. Berendsen and F.W. Vaandrager. Compositional Abstraction in Real-Time Model Checking. In F. Cassez and C. Jard, editors. Proceedings FORMATS'08, Saint-Malo, France, September 15-17, 2008. LNCS 5215, pp. 233-249, Springer-Verlag, 2008.
• [Octopus08]
  G. Igna, Venkatesh Kannan, Yang Yang, Twan Basten, Marc Geilen, Frits Vaandrager, Marc Voorhoeve, Sebastian De Smet, and Lou Somers. Formal Modeling and Scheduling of Datapaths of Digital Document Printers. In F. Cassez and C. Jard, editors. Proceedings FORMATS'08, Saint-Malo, France, September 15-17, 2008. LNCS 5215, pp. 170-187, Springer-Verlag, 2008.
• Frits Vaandrager. Wat is Model Checking. Course notes (in Dutch), March 2008.
• Jan Friso Groote, Paul Klint en Frits Vaandrager. ICT-onderwijs moet een forse impuls krijgen. Ingezonden brief. NRC, 05-04-2008.

2007

• [CSV06]
  L. Cheung, M.I.A. Stoelinga and F.W. Vaandrager. A Testing Scenario for Probabilistic Processes. In Journal of the ACM 54(6), December 2007 (This is the full version of our ICALP'03 paper.) (For her contribution to this paper, Marielle Stoelinga received the 2008 Professor De Winter prize.)
• [BV07]
  J. Berendsen and F.W. Vaandrager. Compositional Abstraction in Real-Time Model Checking. Technical Report ICIS-R07027, ICIS, Radboud University Nijmegen, November 2007.
• [LSVsiam]
  N.A. Lynch, R. Segala and F.W. Vaandrager. Observing Branching Structure Through Probabilistic Contexts. In: SIAM Journal on Computing 37(4):977-1013, 2007. (This is the full version of our CONCUR'03 paper.)

2006

• [ZFV06]
  Miaomiao Zhang, S. Fregonese and F.W. Vaandrager. Formal Specification and Mechanical Verification of a Vehicle System. Technical Report, ICIS, Radboud University Nijmegen. To appear.
• [Vaa06b]
  F.W. Vaandrager. Modelgebaseerde Verificatie en Validatie Loont. Bits & Chips 8(15):53--55, 28 September 2006.
• [Vaa06]
  F.W. Vaandrager. Does it Pay Off? Model-Based Verification and Validation of Embedded Systems! In PROGRESS White Papers 2006. STW, pages 43-66. 2006. Available as Technical Report ICIS-R06019, ICIS, Radboud University Nijmegen, July 2006.
• [GVZ06]
  B. Gebremichael, F.W. Vaandrager, and Miaomiao Zhang. Analysis of the Zeroconf Protocol using Uppaal. In Proceedings of the 6th Annual ACM & IEEE Conference on Embedded Software (EMSOFT 2006), Seoul, South Korea, October 22-25, 2006. ACM Press, pages 242-251. Full version available as Technical Report ICIS-R06016, ICIS, Radboud University Nijmegen, 2006.
• [VG06]
  F.W. Vaandrager and A.L. de Groot. Analysis of a Biphase Mark Protocol with Uppaal and PVS. In Formal Aspects of Computing Journal 18(4):433-458, December 2006.
• [CLSV06]
  L. Cheung, N.A. Lynch, R. Segala and F.W. Vaandrager. Switched PIOA: Parallel Composition via Distributed Scheduling. In Theoretical Computer Science 365(1-2):83-108, 2006. DOI.
• [CSV06]
  L. Cheung, M.I.A. Stoelinga and F.W. Vaandrager. A Testing Scenario for Probabilistic Processes. Technical Report ICIS-R06002, ICIS, Radboud University Nijmegen, January 2006. (This is the full version of our ICALP'03 paper.)
• [KLSV06]
  D.K. Kaynar, N.A. Lynch, R. Segala and F.W. Vaandrager. The Theory of Timed I/O Automata. Synthesis Lecture on Computer Science, Morgan & Claypool Publishers, 101pp, April 2006. ISBN 159829010X.
• [HNV06]
  M. Hendriks, N.J.M. van den Nieuwelaar and F.W. Vaandrager. Model Checker Aided Design of a Controller for a Wafer Scanner. In International Journal on Software Tools for Technology Transfer (STTT) 8(6):633-647, Special Section on Quantitative Analysis of Real-time Embedded Systems, 2006.

2005

• [GV04]
  B. Gebremichael and F.W. Vaandrager. Specifying Urgency in Timed I/O Automata. In B.K. Aichernig and B. Beckert, editors. Proceedings of the 3rd IEEE International Conference on Software Engineering and Formal Methods (SEFM 2005), Koblenz, Germany, September 5-9, 2005. IEEE Computer Society, pages 64-73.
  Full version available as Technical Report NIII-R0459, NIII, Radboud University Nijmegen, December 2004.
• [NOC05]
  B. Gebremichael, F.W. Vaandrager, M. Zhang, K. Goossens, E. Rijpkema and A. Radulescu. Deadlock Prevention in the Aethereal Protocol. In D. Borrione and W. Paul, editors. Proceedings 13th IFIP Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME'05), Saarbrucken, Germany, October 3-6, 2005. LNCS 3725, pages 345--348. Springer-Verlag, 2005.
  Extended version available as B. Gebremichael, F.W. Vaandrager and Miaomiao Zhang. Formal Models of Guaranteed and Best-Effort Services for Networks on Chip. Technical Report ICIS-R05016, ICIS, Radboud University Nijmegen, March 2005.
• [CLSV04]
  L. Cheung, N.A. Lynch, R. Segala and F.W. Vaandrager. Switched Probabilistic I/O automata. In Z. Liu and K. Araki, editors. Proceedings First International Colloquium on Theoretical Aspects of Computing (ICTAC2004), Guiyang, China, 20-24 September 2004. LNCS 3407, pages 494-510. Springer Verlag, 2005.
  Full version available as Technical Report NIII-R0437, NIII, Radboud University Nijmegen, September 2004.

2004

• [Va04]
  F.W. Vaandrager and A.L. de Groot. Analysis of a Biphase Mark Protocol with Uppaal and PVS. Technical Report NIII-R0445, NIII, Radboud University Nijmegen, 2004.
• [HNV04]
  M. Hendriks, N.J.M. van den Nieuwelaar and F.W. Vaandrager. Model Checker Aided Design of a Controller for a Wafer Scanner. In T. Margaria, B. Steffen, A. Philippou and M. Reitenspiess, editors. Preliminary Proceedings 1st International Symposium on Leveraging Applications of Formal Methods (ISOLA'04), Paphos, Cyprus, 30 October - 2 November 2004. Technical Report TR-2004-6, Department of Computer Science, University of Cyprus, pages 201-209. Full version available as Technical Report NIII-R0430, NIII, University of Nijmegen, June 2004. This paper is referred to in patent application ASML ref. P-1784.010.
• [GV04]
  W.O.D. Griffioen and F.W. Vaandrager. A Theory of Normed simulations. In ACM Transactions on Computational Logic (TOCL). 5(4):577-610, October 2004.
• [JV04]
  B.P.F. Jacobs and F.W. Vaandrager. Onderzoeksagenda Remt Innovatief Onderzoek. Automatisering Gids, 37(28):13, 9 July 2004.
• [HBLV04]
  M. Hendriks, G. Behrmann, K.G. Larsen, P. Niebert, and F.W. Vaandrager. Adding Symmetry Reduction to Uppaal. In K.G. Larsen and P. Niebert, editors. Proceedings First International Workshop on Formal Modeling and Analysis of Timed Systems (FORMATS 2003), September 6-7 2003, Marseille, France. LNCS 2791, pages 46-59. Springer Verlag, 2004.
  Full version available as Technical Report NIII-R0407, NIII, University of Nijmegen, February 2004.
• [GeV03]
  B. Gebremichael and F.W. Vaandrager. Control Synthesis for a Smart Card Personalization System Using Symbolic Model Checking. In K.G. Larsen and P. Niebert, editors. Proceedings First International Workshop on Formal Modeling and Analysis of Timed Systems (FORMATS 2003), September 6-7 2003, Marseille, France. LNCS 2791, pages 189 - 203. Springer Verlag, 2004.
  Also available as Technical Report NIII-R0312, NIII, University of Nijmegen, May 2003.

2003

• [SV03]
  M.I.A. Stoelinga and F.W. Vaandrager. A Testing Scenario for Probabilistic Automata. In J.C.M. Baeten, J.K. Lenstra, J. Parrow and G.J. Woeginger, editors. Proceedings ICALP'03, LNCS 2719, pages 407-418. Springer-Verlag, 2003. This paper received the EATCS best paper award.
• [RTSS03]
  D.K. Kaynar, N.A. Lynch, R. Segala and F.W. Vaandrager. A Framework for Modelling Timed Systems with Restricted Hybrid Automata. In Proceedings 24th IEEE International Real-Time Systems Symposium (RTSS03), December 3-5, 2003, Cancun, Mexico. IEEE Computer Society, pages 166-177. Full version available as D.K. Kaynar, N.A. Lynch, R. Segala and F.W. Vaandrager. The Theory of Timed I/O Automata. Technical Report MIT-LCS-TR-917a, MIT Laboratory for Computer Science, Cambridge, MA, 2004.
• [vG03]
  R.J. van Glabbeek and F.W. Vaandrager. Bundle Event Structures and CCSP. In R. Amadio and D. Lugiez, editors. Proceedings 14th International Conference on Concurrency Theory (CONCUR 2003), Marseille, France, September 3-5, 2003. LNCS 2761, pages 57-71. Springer-Verlag, 2003.
• [LSV03b]
  N.A. Lynch, R. Segala and F.W. Vaandrager. Compositionality for Probabilistic Automata. In R. Amadio and D. Lugiez, editors. Proceedings 14th International Conference on Concurrency Theory (CONCUR 2003), Marseille, France, September 3-5, 2003. LNCS 2761, pages 208-221. Springer-Verlag, 2003. Full version available as Technical Report NIII-R0444, NIII, Radboud University Nijmegen, November 2004.
• [HNV03]
  M. Hendriks, N.J.M. van den Nieuwelaar and F.W. Vaandrager. Recognizing Finite Repetitive Scheduling Patterns in Manufacturing Systems. In G. Kendall, E. Burke and S. Petrovic, editors. Proceedings of the 1st Multidisciplinary International Conference on Scheduling: Theory and Applications (MISTA 2003), Nottingham, UK, August 13-16, 2003, Volume I, pages 291-319. The University of Nottingham, UK, 2003. ISBN 0-9545821-0-1.
• [IPDS03]
  H. Bohnenkamp, P. van der Stok, H. Hermanns, and F. Vaandrager. Cost-Optimisation of the IPv4 Zeroconf Protocol. In Proceedings of the 2003 International Conference on Dependable Systems and Networks (DSN'03), June 22-25, San Fransisco CA, IEEE CS Press, pages 531-540, June 2003.
• [FVZ03]
  A. Fehnker, Miaomiao Zhang and F.W. Vaandrager. Modeling and Verifying a Lego Car Using Hybrid I/O Automata. In Third International Conference on Quality Software (QSIC 2003), Dallas, Texas, USA, November 6 - 7, IEEE Computer Society Press, pages 280-289, 2003. Full version in M. Broy and M. Pizka, editors. Models, Algebras, and Logic of Engineering Software, Nato ASI Series III: Computer and Systems Sciences, Volume 191, pages 385-402, IOS Press, 2003. Also available as Technical Report NIII-R0308, University of Nijmegen, March 2003.
• [LSV03]
  N.A. Lynch, R. Segala and F.W. Vaandrager. Hybrid I/O automata. Information and Computation 185(1):105-157, August 2003. Available as Technical Report MIT-LCS-TR-827d, MIT Laboratory for Computer Science, Cambridge, MA 02139, January 13, 2003.

2002

• [PROGRESS02]
  H. Bohnenkamp, H. Hermanns, Miaomiao Zhang and F. Vaandrager. Cost-Optimisation of the IPv4 Zeroconf Protocol. Proceedings of the 3rd PROGRESS Workshop on Embedded Systems, Utrecht, the Netherlands, October 24, 2002. PROGRESS/STW ISBN 90-73461-34-0.
• [HRSV02]
  T. Hune, J.M.T. Romijn, M.I.A. Stoelinga and F.W. Vaandrager. Linear parametric model checking of timed automata. Journal of Logic and Algebraic Programming, 52-53:183--220, 2002. Extended abstract appeared in T. Margaria and W. Yi, editors. Proceedings TACAS'2001, Genova, Italy, April 2001. LNCS 2031, pages 189-203. Springer-Verlag, 2001.

2001

• [SVA01]
  J.G. Springintveld, F.W. Vaandrager and P.R. D'Argenio. Testing timed automata. Theoretical Computer Science Volume 254, Issue 1-2, 6 March 2001, pages 225-257. See also TCS webpages.
• [LSV01]
  N.A. Lynch, R. Segala and F.W. Vaandrager. Hybrid I/O automata revisited. In M.D. Di Benedetto and A.L. Sangiovanni-Vincentelli, editors. Proceedings HSCC'01, Rome, Italy, March 2001. LNCS 2034, pages 403-417. Springer-Verlag, 2001.
• [Betal01]
  G. Behrmann, A. Fehnker, T. Hune K.G. Larsen, Paul Pettersson, J.M.T. Romijn and Frits Vaandrager. Minimum-cost reachability for priced timed automata. In M.D. Di Benedetto and A.L. Sangiovanni-Vincentelli, editors. Proceedings HSCC'01, Rome, Italy, March 2001. LNCS 2034, pages 147-161. Springer-Verlag, 2001. Full version available as Technical Report CSI-R0109, Computing Science Institute, University of Nijmegen, March 2001, and as BRICS Report RS-01-3, Denmark, January 2001. Slides.

2000

• [Va00b]
  F.W. Vaandrager. De Verleidingen van het Hitlijstdenken. Automatisering Gids 34(19):23, May 12, 2000. AG archief versie.
• [BHV00]
  G. Behrmann, T. Hune and F.W. Vaandrager. Distributed Timed Model Checking - How the Search Order Matters. In E.A. Emerson and A.P. Sistla, editors. Proceedings CAV'2000, Chicago, July 2000. LNCS 1855, pages 216-231. Springer-Verlag, 2000.
• [DGRV00]
  M.C.A. Devillers, W.O.D. Griffioen, J.M.T. Romijn and F.W. Vaandrager. Verification of a Leader Election Protocol - Formal Methods Applied to IEEE 1394. Formal Methods in System Design 16(3):307-320, June 2000.
  A preliminary version appeared as Technical Report CSI-R9728, Computing Science Institute, University of Nijmegen, December 1997.
• [Va00a]
  F.W. Vaandrager. Nieuwe Citatie-Index Voorkomt Dubbel Werk. Automatisering Gids 34(8):19, February 25, 2000 AG archief versie.

1999

• [Hybrid99]
  F.W. Vaandrager and J.H. van Schuppen (Eds.) Proceedings of the Second International Workshop on Hybrid Systems: Computation and Control (HSCC'99), Berg en Dal, The Netherlands, March 1999. LNCS 1569, Springer-Verlag, X+271 pages. 1999.
• [LSVW99]
  N.A. Lynch, R. Segala, F.W. Vaandrager and H.B. Weinberg. Hybrid I/O automata. Technical Report CSI-R9907, Computing Science Institute, University of Nijmegen, April 1999.
• [SV99]
  M.I.A. Stoelinga and F.W. Vaandrager. Root Contention in IEEE 1394. In J.-P. Katoen, editor, Proceedings of the 5th AMAST Workshop on Real-Time and Probabilistic Systems (ARTS'99), Bamberg, Germany. LNCS 1601, pages 53-74, Springer-Verlag, 1999. Also available as Technical Report CSI-R9905, Computing Science Institute, University of Nijmegen, March 1999. Detailled proofs of some invariants and a refinement.

1998

• [Embedded98]
  G. Rozenberg and F.W. Vaandrager (Eds.) Lectures on Embedded Systems. LNCS 1494, Springer-Verlag, VIII+423 pages. 1998. Preface and Table of Contents. Introduction to this volume. Local copy of intro .
• [DFMV98]
  H. Dierks, A. Fehnker, A. Mader and F.W. Vaandrager. Operational and logical semantics for polling real-time systems. Technical Report CSI-R9813, Computing Science Institute, University of Nijmegen, April 1998. A preliminary version appears in A.P. Ravn and H. Rischel, editors, Proceedings FTRTFT'98, Lyngby, Denmark, LNCS 1486, pages 29-40, Springer-Verlag, 1998.
• [GV98a]
  W.O.D. Griffioen and F.W. Vaandrager. Normed simulations. In A.J. Hu and M.Y. Vardi, editors, Proceedings CAV'98, Vancouver, BC, Canada, LNCS 1427, pages 332-344, Springer-Verlag, 1998.
• [Va98]
  F.W. Vaandrager. Logica is prachtig hulpmiddel bij oplossen informaticaproblemen. Automatisering Gids 32(13):17, March 27, 1998.

1997

• [DGV97]
  R. De Nicola, U. Goltz and F.W. Vaandrager (editors). Expressiveness in Concurrency. Dagstuhl-Seminar-Report; 156 16.09.-20.09.96 (9638), IBFI GmbH, Schloss Daghstuhl, Wadern, Germany, 1997.
• [GV97]
  R.J. van Glabbeek and F.W. Vaandrager. The difference between splitting in n and n+1. Information and Computation, 136(2):109-142, August 1997. An extended abstract appeared in: E. Best and G. Rozenberg, editors, Proceedings 3rd Workshop on Concurrency and Compositionality, Goslar, GMD-Studien Nr. 191, pages 117-121. Universitaet Hildesheim, 1991.

1996

• [Va96a]
  F.W. Vaandrager. De Ingebouwde Informatica. Katholieke Universiteit Nijmegen, December 1996. (Inaugural speech, in Dutch)
• [RV96]
  J.M.T. Romijn and F.W. Vaandrager. A note on fairness in I/O automata. Information Processing Letters, 59(5):245-250, 1996.
• [HV96]
  D.K. Hammer and F.W. Vaandrager. Ingebouwde systemen nog verre van feilloos. Automatisering Gids, 26 April 1996. (In Dutch) An abstract of this paper (also in Dutch) has appeared in the VIE jaarboek, Vereniging van Informatica-ingenieurs Eindhoven, July 1996.
• [SV96]
  J.G. Springintveld and F.W. Vaandrager. Minimizable timed automata. In B. Jonsson and J. Parrow, editors, Proceedings FTRTFT'96, Uppsala, Sweden, LNCS 1135, pages 130-147. Springer-Verlag, 1996. local copy
• [LV96]
  N.A. Lynch and F.W. Vaandrager. Forward and backward simulations Part II: Timing-based systems. Information and Computation, 128(1):1-25, July 1996.
• [LV96b]
  N.A. Lynch and F.W. Vaandrager. Action transducers and timed automata. Formal Aspects of Computing 8(5):499-538, Sept-Oct 1996.
• [Va96]
  F.W. Vaandrager. Hybrid systems. In Images of SMC Research 1996, pages 305-316, Stichting Mathematisch Centrum, 1996.
• [LSVW96]
  N.A. Lynch, R. Segala, F.W. Vaandrager and H.B. Weinberg. Hybrid I/O automata. In R. Alur and T.A. Henzinger and E.D. Sontag, editors, Hybrid Systems III, LNCS 1066, pages 496-510. Springer-Verlag, 1996. Also available as Report CS-R9578, CWI, Amsterdam, December 1995.

1995

• [LV95]
  N.A. Lynch and F.W. Vaandrager. Forward and backward simulations Part I: Untimed systems. Information and Computation, 121(2):214-233, September 1995. (Postscript) A preliminary version (but with some material that has been omitted in the journal version) appeared as CWI technical report CS-R9313.
• [DV95]
  R. De Nicola and F.W. Vaandrager. Three logics for branching bisimulation. Journal of the ACM, 42(2):458-487, 1995. (pdf)
• [Va95a]
  F.W. Vaandrager. Verification of a distributed summation algorithm. In I. Lee and S.A. Smolka, editors, Proceedings 6th International Conference on Concurrency Theory (CONCUR'95), Philadelphia, PA, USA, LNCS 962, pages 190-203. Springer-Verlag, 1995. Full version available as CWI technical report CS-R9505.

1994

• [ABV94]
  L. Aceto, B. Bloom and F.W. Vaandrager. Turning SOS rules into equations. LICS'92 Special Issue of Information and Computation, 111(1):1-52, 1994. (Postscript)
• [BPV94]
  D.J.B. Bosscher, I. Polak and F.W. Vaandrager. Verification of an audio control protocol. In H. Langmaack, W.P. de Roever, and J. Vytopil, editors, Proceedings 3rd International School and Symposium on Formal Techniques in Real Time and Fault Tolerant Systems (FTRTFT'94), Luebeck, Germany, September 1994, LNCS 863, pages 170-192. Springer-Verlag, 1994. This paper received the FTRTFT'94 best paper award. Full version appeared in T. Rus and C. Rattray, editors, Theories and Experiences for Real-Time System Development, AMAST Series in Computing, Vol 2, pages 147-176, World Scientific, Singapore, 1994. Available as CWI technical report CS-R9445.
• [BlV94]
  B. Bloom and F.W. Vaandrager. SOS rule formats for parameterized and state-bearing processes. Unpublished manuscript, July 1994.
• [HSV94]
  L. Helmink, M.P.A. Sellink and F.W. Vaandrager. Proof-checking a data link protocol. In H. Barendregt and T. Nipkow, editors, Proceedings International Workshop TYPES'93, Nijmegen, The Netherlands, May 1993. LNCS 806, pages 127-165. Springer-Verlag, 1994. Full version available as UU and CWI technical report Preprint 109.

1993

• [Va93b]
  F.W. Vaandrager. Informatica en rationalisme. In H.J.M. Goeman and W.A. Kosters, editors, Liber Amicorum voor A. Ollongren, Department of Computer Science, Leiden University, December 1993. (In Dutch)
• [JSV93]
  A.S.A. Jeffrey, S.A. Schneider and F.W. Vaandrager. A comparison of additivity axioms in timed transition systems. Report CS-R9366, CWI, Amsterdam, November 1993. Computer Science Technical Report 93/11, School of Cognitive and Computing Sciences, University of Sussex, 1993.
• [GV93]
  R.J. van Glabbeek and F.W. Vaandrager. Modular specification of process algebras. Theoretical Computer Science, 113(2):293-348, 1993.
• [Va93]
  F.W. Vaandrager. Expressiveness results for process algebras. In J.W. de Bakker, W.P. de Roever, and G. Rozenberg, editors, Proceedings REX Workshop on Semantics: Foundations and Applications. LNCS 666, pages 609-638. Springer-Verlag, 1993. Available as CWI technical report CS-R9301.

1992

• [GrV92]
  J.F. Groote and F.W. Vaandrager. Structured operational semantics and bisimulation as a congruence. Information and Computation, 100(2):202-260, 1992.
• [BV92]
  J.C.M. Baeten and F.W. Vaandrager. An algebra for process creation. Acta Informatica, 29(4):303-334, 1992.
• [LV92]
  N.A. Lynch and F.W. Vaandrager. Forward and backward simulations for timing-based systems. In J.W. de Bakker, C. Huizing, W.-P de Roever, and G. Rozenberg, editors, Proceedings REX Workshop on Real-Time: Theory in Practice. LNCS 600, pages 397-446. Springer-Verlag, 1992.

1991

• [Va91b]
  F.W. Vaandrager. Determinism -> (event structure isomorphism = step sequence equivalence). Theoretical Computer Science, 79:275-294, 1991.
• [Va91a]
  F.W. Vaandrager. On the relationship between process algebra and input/output automata (extended abstract). In Proceedings 6th Annual Symposium on Logic in Computer Science (LICS'91), Amsterdam, pages 387-398. IEEE Computer Society Press, 1991. (Postscript)

1990

• [Va90c]
  F.W. Vaandrager. Algebraic techniques for concurrency and their application. PhD Thesis, University of Amsterdam, February 1990. CWI, Amsterdam, 1989.
• [DMV90]
  R. De Nicola, U. Montanari and F.W. Vaandrager. Back and forth bisimulations. In J.C.M. Baeten and J.W. Klop, editors, Proceedings First International Conference on Concurrency Theory (CONCUR'90), Amsterdam. LNCS 458, pages 152-165. Springer-Verlag, 1990.
• [GrV90]
  J.F. Groote and F.W. Vaandrager. An efficient algorithm for branching bisimulation and stuttering equivalence. In M.S. Paterson, editor, Proceedings 17th Int'l Coll. Automata, Languages and Programming (ICALP'90), Warwick. LNCS 443, pages 626-638. Springer-Verlag, 1990. Also available as Report CS-R9001, CWI, Amsterdam, January 1990.
• [DV90]
  R. De Nicola and F.W. Vaandrager. Action versus state based logics for transition systems. In I. Guessarian, editor, Semantics of Systems of Concurrent Processes, Proceedings LITP Spring School on Theoretical Computer Science, La Roche Posay, France. LNCS 469, pages 407-419. Springer-Verlag, 1990.
• [Va90b]
  F.W. Vaandrager. Two simple protocols. In J.C.M. Baeten, editor, Applications of process algebra, Cambridge Tracts in Theoretical Computer Science 17, pages 23-44. Cambridge University Press, 1990.
• [Va90]
  F.W. Vaandrager. Process algebra semantics of POOL. In J.C.M. Baeten, editor, Applications of process algebra, Cambridge Tracts in Theoretical Computer Science 17, pages 173-236. Cambridge University Press, 1990. Also appeared as Technical Report CS-R8629, CWI, Amsterdam, 1986.
• [Va90a]
  F.W. Vaandrager. Some observations on redundancy in a context. In J.C.M. Baeten, editor, Applications of process algebra, Cambridge Tracts in Theoretical Computer Science 17, pages 237-260. Cambridge University Press, 1990.

1989

• [Va89]
  F.W. Vaandrager. A simple definition for parallel composition of prime event structures. Report CS-R8903, CWI, Amsterdam, March 1989.
• [GrV89]
  J.F. Groote and F.W. Vaandrager. Structured operational semantics and bisimulation as a congruence (extended abstract). In G. Ausiello, M. Dezani-Ciancaglini, and S. Ronchi Della Rocca, editors, Proceedings 16th Int'l Coll. Automata, Languages and Programming (ICALP'89), Stresa. LNCS 372, pages 423-438. Springer-Verlag, 1989.

1988

• [BV88]
  J.C.M. Baeten and F.W. Vaandrager. Specification and verification of a circuit in ACP. Report P8821 (replaces P8803), Programming Research Group, University of Amsterdam, October 1988.

1987

• [GV87]
  R.J. van Glabbeek and F.W. Vaandrager. Petri net models for algebraic theories of concurrency. In J.W. de Bakker, A.J. Nijman, and P.C. Treleaven, editors, Proceedings PARLE conference, Eindhoven, Vol. II (Parallel Languages). LNCS 259, pages 224-242. Springer-Verlag, 1987.

1986

• [Va86]
  F.W. Vaandrager. Verification of two communication protocols by means of process algebra. Report CS-R8608, CWI, Amsterdam, January 1986.

1985

• [BV85]
  F.A.J. Birrer and F.W. Vaandrager. Politie-informatiesystemen, Automatisering en Privacy. In Kwartaalschrift Privacy en Persoonsregistratie, 10(3):15-19, 1985.